Generative AI, high-performance computing (HPC), and large data centers are constantly driving demand for higher energy efficiency, stronger heat dissipation control, and more compact packaged chips, highlighting the strategic position of advanced packaging in the semiconductor supply chain. In China, panel level packaging (PLP) is receiving increasing attention due to its larger size, higher output, and lower potential cost.
Chinese power semiconductor IDM (vertically integrated manufacturing) giant China Resources Microelectronics is advancing PLP technology to lay out AI server power supplies, 800G and 1.6T optical modules, and solid-state transformers (SST), with advanced packaging as the core driving force for its next stage of growth.
Image source: China Resources Microelectronics
AI power demand drives PLP to break through traditional packaging bottlenecks
China Resources Microelectronics' transition from power semiconductors to PLP reflects the comprehensive upgrade of power device requirements in the AI era.
Industry observers point out that compared to logic chips such as CPUs and GPUs, power devices rely more on packaging. Because heat dissipation efficiency, parasitic resistance, thermal conductivity, and packaging size directly affect power performance and energy loss.
With the soaring power consumption of AI servers, high-speed optical modules, and data center equipment, traditional packaging is no longer able to achieve a balance between power density, miniaturization, and low temperature rise, which is forcing power semiconductors to evolve towards more advanced packaging technologies.
Compared with wafer level packaging (WLP), PLP uses larger panels, thereby improving area utilization and unit output, becoming a key path to reducing advanced packaging costs.
China Resources Microelectronics stated that the company has completed the development of 600mm x 600mm PLP panel technology, overcoming key process challenges including panel warping, chip drift, graphic alignment, and reliability. The company stated that the platform also supports double-sided heat dissipation and low parasitic resistance design, thereby enhancing the thermal management capabilities of AI chips and high-power devices.
The company revealed that the yield of PLP has reached the level of mass production, and this technology has been introduced into AI server power management chips (PMIC), power modules for smartphones and wearable devices, and automotive microcontrollers (MCU).
Cost is another major driving factor. In the fiercely competitive power semiconductor market, PLP's square panel process has a higher material utilization rate than circular wafers, making it more suitable for large-scale power device production.
Unlike advanced packaging technologies such as CoWoS, which primarily serve high-end AI GPUs, PLP is more geared towards high-yield and cost sensitive markets, which is in line with China Resources Microelectronics' shipping model for large-scale power devices.
Optical modules bring PLP into the era of 3D integration
Optical communication is another target market. China Resources Microelectronics stated that its PLP platform utilizes 3D stacking and mold through plastic (TMV) interconnect technology to embed ASIC, DSP and other chips under the substrate, while stacking passive components or chips above, thereby reducing the footprint of power modules.
The company stated that this design creates vertical heat dissipation channels, solving the heat dissipation problem after 3D stacking. The related products have started to be shipped to Chinese optical module customers, and the next generation laser driver power module jointly developed with end customers is expected to enter mass production in the second half of 2026.
Silicon carbide and solid-state transformers open up a new market for PLP
China Resources Microelectronics will also combine PLP with silicon carbide (SiC) power devices for solid-state transformers (SST). Solid state transformer technology utilizes high-voltage power semiconductors such as silicon carbide to transform traditional large transformers into more efficient and compact power conversion systems to meet the needs of future AI data centers and smart grids.
The company stated that it has established a SiC MOSFET and module product line ranging from 650V to 2300V, and is currently developing high-voltage module packaging solutions for 1200V, 1700V, and 2300V applications.
As packaging technology shifts from simple chip protection to system level integration, the Chinese semiconductor industry is increasing its investment in PLP. However, this technology still faces numerous obstacles in terms of equipment, ecosystem construction, and stability in large-scale production.